Autonomous vehicles get roughly a heartbeat’s worth of time to read the road, decide what’s happening, and react. That razor-thin window is exactly why Waymo has built a custom AI chip designed to compress sensor processing down to the fewest possible milliseconds. The Alphabet-backed robotaxi company detailed the silicon in a blog post this week, marking the first time it has publicly broken down the hardware sitting in the trunk of every one of its driverless cars.
Summary
Key takeaways
- Waymo has designed its own AI ASIC, manufactured on TSMC’s 5-nanometer process, to process sensor data faster than the off-the-shelf hardware it previously relied on.
- The chip’s design draws on more than 200 million miles of real-world autonomous driving data and can run both convolutional neural networks and transformer models.
- Waymo says the ASIC delivers over 1,000 TOPS of AI performance, likely measured at INT8 precision, though exact power draw remains unclear.
- The company still leans on outside suppliers, including AMD, Micron, Samsung, Sandisk, and Nvidia, for non-machine-learning tasks like data logging and orchestration.
- Waymo previously used Intel FPGAs for sensor processing before shifting to its own silicon, joining Tesla in the race to build custom chips for autonomous driving.
Waymo’s Custom AI Chip Built for Split-Second Decisions
Waymo’s new chip exists to turn a flood of raw camera, radar, and lidar data into a driving decision before a dangerous moment can fully unfold. The company describes it as the front line of its compute stack, cleaning up incoming sensor streams and running fast AI checks the instant information arrives, rather than shipping messy raw data straight to the car’s main processing brain.
Built on TSMC’s 5-Nanometer Process
The chip is manufactured using TSMC’s 5-nanometer process technology, putting Waymo alongside major chipmakers that rely on the Taiwanese foundry giant for cutting-edge silicon. Choosing a modern process node matters because it lets Waymo pack more computing power into a smaller, more power-efficient package that has to survive inside a moving vehicle rather than a climate-controlled data center.
Just as important as raw density is flexibility. The ASIC is built to run both convolutional neural networks and comparable transformer-based architectures represent both conventional machine learning approaches and contemporary models powering today’s AI chatbots and image generators. That dual capability lets Waymo update its perception software over time without needing entirely new hardware every time its models evolve.
How the Chip Learned From 200 Million Miles of Driving
Waymo says the chip’s architecture reflects lessons pulled from more than 200 million miles of accumulated autonomous driving data, giving the design a real-world grounding that off-the-shelf chips can’t easily match. That volume of driving history shaped how the silicon handles responsiveness, reliability, and redundancy under actual road conditions rather than lab simulations.
Latency Minimization as a Safety Priority
Cutting latency was the chip’s central design goal, since accidents can unfold faster than any remote human operator could ever intervene. “Within those critical milliseconds, advanced ML models build a high-fidelity understanding of the environment to evaluate the safest path forward,” the company explained, describing how the system performs real-time temporal noise reduction to sharpen visibility in low light.
Waymo’s engineering leaders framed the challenge in similarly urgent terms. Satish Jeyachandran, VP of Engineering, and Daniel Rosenband, Compute Lead, wrote that the company is “designing a state-of-the-art system that would be considered impressive for a data center, with the added complexity of an in-vehicle operating domain and real-time requirements,” according to The Verge. They described the compute stack as guided by three non-negotiable principles: responsive, ruggedized, and redundant.
All that responsiveness demands serious horsepower. Waymo claims its dedicated front-end chip delivers over 1,000 TOPS of AI performance, though the company hasn’t disclosed the precision level or power consumption behind that figure. Without those details, direct comparisons to rival autonomous vehicle and robotics hardware remain difficult, though the TOPS figure is likely measured at INT8 precision, which would place it in a similar performance class to Nvidia’s Drive AGX Thor platform.
Redundancy, Cooling, and the Rest of the Hardware Stack
Compute power alone isn’t enough when the hardware lives inside a car exposed to constant vibration, road shock, and extreme temperature swings that no data center chip has to withstand. Waymo addresses that with multiple layers of redundancy, essentially running duplicate systems so a single failure doesn’t take the vehicle’s perception offline. The chips themselves are liquid cooled, tapping into the same coolant system that regulates the vehicle’s engine, keeping the silicon at safe operating temperatures regardless of outside weather.
This is where Waymo’s shift away from its earlier setup becomes clear. Before rolling out its own ASIC, the company relied on Intel FPGAs for sensor processing. FPGAs are well suited to low-latency work, which is one reason high-frequency trading firms often use them, but they’re notoriously difficult to program and can’t match the compute density of purpose-built silicon.
Partners Handling Non-ML Tasks
Waymo isn’t building every piece of its computing stack from scratch. The company continues to rely on outside suppliers for non-machine-learning functions like orchestration, data movement, and logging, naming AMD, Micron, Samsung, Sandisk, and Nvidia as partners providing those components, with Socionext also cited by The Verge among the hardware suppliers involved. Waymo has said it’s developing several additional custom chips and systems, meaning its current ASIC is just one piece of a broader in-house silicon strategy rather than a full replacement for third-party hardware.
That heterogeneous approach reflects a deliberate trade-off. Rather than trying to build an entire compute system internally, Waymo is concentrating its engineering effort on real-time sensor fusion and front-end machine learning, the areas where custom silicon offers the biggest latency advantage, while leaning on established chipmakers for everything else.
Waymo vs Tesla: A Broader Chip Race in Robotaxis
Waymo isn’t the only company betting on custom silicon to win the robotaxi race. Tesla has spent years developing its own chips for autonomous driving and recently launched a limited Robotaxi service in Austin after repeated delays. The two companies also diverge sharply in philosophy: Tesla CEO Elon Musk has dismissed lidar as a “crutch” and “a fool’s errand,” arguing that fusing data from multiple sensor types introduces dangerous ambiguity when signals disagree.
Waymo’s approach runs in the opposite direction, betting that combining cameras, radar, and lidar through dedicated silicon makes its system more reliable, not less, and that custom chips are what let it deploy at meaningful scale. The company plans to share further detail on its machine learning accelerators next week at the Hot Chips conference at Stanford, a venue that could offer the clearest look yet at how its silicon strategy stacks up against rivals racing toward the same goal.
FAQ
What is the primary function of Waymo’s custom AI chip?
It processes raw sensor data from autonomous vehicles rapidly, converting it into driving responses with minimal latency.
Which manufacturing technology is used for Waymo’s chip?
The chip is manufactured using TSMC’s 5-nanometer process technology.
What machine learning models can Waymo’s chip run?
It can run both traditional models like convolutional neural networks and modern transformer models.
How does Waymo ensure the reliability of its custom chips in vehicles?
Waymo employs multi-layer redundancy and liquid cooling systems to maintain chip performance in harsh conditions.
Article produced with the assistance of artificial intelligence and reviewed by the editorial team.
